These parallel-in or serial-in, serial-out shift registers fea- ture gated clock inputs and an overriding clear input. All inputs are buffered to lower the drive. 74LS Counter Shift Registers are available at Mouser Electronics. Mouser offers inventory, pricing, & datasheets for 74LS Counter Shift Registers. Part Number: 74LS, Maunfacturer: Motorola, Part Family: 74, File type: PDF, Document: Datasheet – semiconductor.
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74LS165N, 74LS165PC, 74LS166
Capacitor Expert By Day, Enginerd by night. The LS is a parallel-in or serial-in, serial-out shift register and has a complexity of 77 equivalent gates with gated clock inputs and an overriding clear input. The was quite easy I thought but the datasheet has gotten me a little foxed.
You will probably find a line over the words Master Reset. The image in my diagram had come from the TI datasheet.
Phillips or NXP as they are now can be a bit wordy but are easier to follow. I’ve stripped back my code to troubleshoot it.
Yep, I’m getting that. That is to reset it you need to put it low.
Don’t know where it came from. Hence, I ran it all up with the and got on quite well with it. This is what I have so far Serial data flow is inhibited during parallel loading.
By utilizing input clamping diodes, switching transients are minimized and system design simplified. This will allow the system clock to be free running and the register datassheet on command with the other clock input. My friend and I had both ordered some s but during the shipping wait I happily found a in my stash of bits. Does anyone have a keener datasgeet than me?
I did have all this working nicely eatasheet a chip: That’s exactly what I needed to know. Clocking is dtaasheet on the low-to-high level edge of the clock pulse via a two input positive NOR gate, which permits one input to be used as a clock enable or clock inhibit function.
Pin 6 is the clock inhibit and should be connected to ground for correct operation. A buffered direct clear input overrides all other inputs, including the clock, and sets all flip-flops to zero.
I started this thread whilst trying to get my head around the different pin labeling on the What else in the data sheet are you having trouble with?
Motorola 74LS Series Datasheets. 74LS, SN54LS Datasheet.
Click here to Download. When high, this input enables the serial data input and couples the eight flip-flops for serial shifting with each clock pulse. It should be connected to the 74ls16 pin of the arduino or the serial input of a cascading chip. A change from low-to-high on the clock inhibit input should only be done when the clock input is high.
For those that follow, the correct pinouts are How long will receive a response. At first I tried modifying the wiring then I stripped it all out and started over.
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Therefore to take it out of reset you place it high. We didn’t get time to make the swap back then but the project is back on the table now and we’re both stumped as to why it’s not working. Just out of curiosity Synchronous loading occurs on the next clock pulse when this is low and the parallel data inputs are enabled. This indicates that the pin should have a zero to activate the name of the function.
I don’t know if this helps The most misleading part of this image however is that the blue lead from Arduino GND looks like it goes to PIN 15 on the – it actually goes to the ground rail and PIN 15 is connected to Ard 8, but is hidden.
I had one mysteriously in my box-o-bits Now my order of 74HC chips has arrived I have found that the pinouts are not only different but have different names. Want to post a buying lead? No pin 13 is an output not an input.
The connections to the Arduino are: James’ datasheet link yields a somewhat friendlier datasheet than the one I’d found from TI. This is the way most chips work. Clocking is inhibited when either of the clock inputs are held high, holding either input low enables the other clock input.